Print ISSN: 1814-5892

Online ISSN: 2078-6069

Volume 9, Issue 1

Volume 9, Issue 1, Winter and Spring 2013, Page 1-35

Restoration of Noisy Blurred Images Using MFPIA and Discrete Wavelet Transform

Dunia S. Tahir

Iraqi Journal for Electrical And Electronic Engineering, Volume 9, Issue 1, Pages 1-15
DOI: 10.33762/eeej.2013.81784

In this paper, image deblurring and denoising are presented. The used images were blurred either with Gaussian or motion blur and corrupted either by Gaussian noise or by salt & pepper noise. In our algorithm, the modified fixed-phase iterative algorithm (MFPIA) is used to reduce the blur. Then a discrete wavelet transform is used to divide the image into two parts. The first part represents the approximation coefficients. While the second part represents the detail coefficients, that a noise is removed by using the BayesShrink wavelet thresholding method.

A Multiplier-less Implementation of Two-Dimensional Circular-Support Wavelet Transform on FPGA

Akram A. Dawood; Zahraa Talal Abede; Jassim M. Abdul-Jabbar

Iraqi Journal for Electrical And Electronic Engineering, Volume 9, Issue 1, Pages 16-28
DOI: 10.33762/eeej.2013.81785

In this paper, a two-dimensional (2-D) circular-support wavelet transform (2-D CSWT) is presented. 2-D CSWT is a new geometrical image transform, which can efficiently represent images using 2-D circular spectral split schemes (circularly-decomposed frequency subspaces). 2-D all-pass functions and lattice structure are used to produce 1-level circular symmetric 2-D discrete wavelet transform with approximate linear phase 2-D filters. The classical one-dimensional (1-D) analysis Haar filter bank branches H0(z) and H1(z) which work as low-pass and high-pass filters, respectively are transformed into their 2-D counterparts H0(z1,z2) and H1(z1,z2) by applying a circular-support version of the digital spectral transformation (DST). The designed 2-D wavelet filter bank is realized in a separable architecture. The proposed architecture is simulated using Matlab program to measure the deflection ratio (DR) of the high frequency coefficient to evaluate its performance and compare it with the performance of the classical 2-D wavelet architecture. The correlation factor between the input and reconstructed images is also calculated for both architectures. The FPGA (Spartan-3E) Kit is used to implement the resulting architecture in a multiplier-less manner and to calculate the die area and the critical path or maximum frequency of operation. The achieved multiplier-less implementation takes a very small area from FPGA Kit (the die area in 3-level wavelet decomposition takes 300 slices with 7% occupation ratio only at a maximum frequency of 198.447 MHz).

Optimal Conductor Selection in Radial Distribution Systems for Productivity Improvement Using Genetic Algorithm

Mahdi Mozaffari Legha; Hassan Javaheri; Mohammad Mozaffari Legha

Iraqi Journal for Electrical And Electronic Engineering, Volume 9, Issue 1, Pages 29-35
DOI: 10.33762/eeej.2013.81786

Development of distribution systems result in higher system losses and poor voltage regulation. Consequently, an efficient and effective distribution system has become more urgent and important. Hence proper selection of conductors in the distribution system is important as it determines the current density and the resistance of the line. This paper examines the use of different evolutionary algorithms, genetic algorithm (GA), to optimal branch conductor selection in planning radial distribution systems with the objective to minimize the overall cost of annual energy losses and depreciation on the cost of conductors and reliability in order to improve productivity.
Furthermore, The Backward-Forward sweep iterative method was adopted to solve the radial load flow analysis. Simulations are carried out on 69-bus radial distribution network using GA approach in order to show the accuracy as well as the efficiency of the proposed solution technique.